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perf(buffer): portable fearless_simd kernels for bitmap rank-select - #10319

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ji/fearless-simd-wins
Oct 6, 2026
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joseph-isaacs merged 5 commits into
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@joseph-isaacs joseph-isaacs commented Oct 5, 2026 •

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Summary

Part of the fearless_simd migration, following #10327. Bitmap rank-select's 64-byte chunk scan and in-chunk select had separate kernels per architecture: NEON vcnt intrinsics, AVX-512 vpopcntq intrinsics and a scalar fallback, all behind cfg(target_arch) and CpuKernel dispatch. This replaces them with one portable #[simd] kernel each, used on every target, including Miri.

Changes

  • vortex-buffer/src/bit/select.rs:
    • scan_chunks popcounts each 64-byte chunk as u64x8 lanes.
    • select_in_chunk uses the same lane popcounts to find the word.
    • Both dispatch via Level::new().
  • Removed:
    • scan_chunks_neon, scan_chunks_avx512_vpopcnt and scan_chunks_scalar;
    • select_in_chunk_vbmi2 and select_in_chunk_scalar;
    • their CpuKernels and every cfg(target_arch).
  • Kept: the BMI2 pdep/tzcnt in-word select. It is a scalar bit-deposit instruction with no fearless_simd equivalent, so its one x86 cfg remains.
  • Adds a select_last_vortex_buffer benchmark, which selects the last set bit in 512-, 65,536- and 1,048,576-bit buffers.

Why u64x8 lanes

The earlier revision summed bytes per 16-byte vector. That was faster on ARM64, but on AVX2 it took 2.1–2.5× as long as develop. Lane popcounts avoid that:

  • x86 AVX2: matches develop (measured below).
  • x86 AVX-512: lowers to vpopcntq, like the removed native kernel.
  • ARM64: lowers to roughly the same vcnt and pairwise-add sequence as the removed NEON kernel. Expect parity with develop rather than the earlier 0.60–0.86×.

Benchmarks

select_last_vortex_buffer on an AVX2-only x86 VM (no AVX-512, so develop uses the scalar chunk scan). Each figure is the fastest of 4 alternating runs × 200 samples, pinned to one core:

Bits develop This PR Ratio
512 11.6 ns 9.8 ns 0.84×
65,536 150.4 ns 151.5 ns 1.01×
1,048,576 2,098 ns 2,103 ns 1.00×

The byte-sum revision measured 2.14× and 2.36× at 65,536 and 1,048,576 bits, which is why it was replaced. The AVX-512 and NEON results come from the CodSpeed runners on this PR.

Testing

  • cargo nextest run -p vortex-buffer --release: 891 passed (x86_64).
  • cargo nextest run -p vortex-buffer --target aarch64-unknown-linux-gnu --release under qemu-aarch64: 889 passed.
  • cargo miri nextest run -p vortex-buffer with CI's MIRIFLAGS: 221 passed. All 23 select tests also passed under Miri with --run-ignored all.
  • cargo clippy -p vortex-buffer -- -D warnings: clean on x86_64 (--all-targets --all-features), aarch64 and wasm32.
  • Not run: native ARM64 or AVX-512 benchmarks.

🤖 Generated with Claude Code

https://claude.ai/code/session_01YUbVgtk4iks9jBGhqe5pTF

Signed-off-by: Joe Isaacs <joe.isaacs@live.co.uk>
@codspeed

codspeed Bot commented Oct 5, 2026 •

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Merging this PR will regress 1 benchmark

⚠️ Unknown Walltime execution environment detected

Using the Walltime instrument on standard Hosted Runners will lead to inconsistent data.

For the most accurate results, we recommend using CodSpeed Macro Runners: bare-metal machines fine-tuned for performance measurement consistency.

⚠️ Different runtime environments detected

Some benchmarks with significant performance changes were compared across different runtime environments,
which may affect the accuracy of the results.

Open the report in CodSpeed to investigate

⚡ 28 improved benchmarks
❌ 1 regressed benchmark
✅ 2072 untouched benchmarks
🆕 3 new benchmarks
⏩ 518 skipped benchmarks1

Warning

Please fix the performance issues or acknowledge them on CodSpeed.

Performance Changes

Mode Benchmark BASE HEAD Efficiency
❌ Simulation bitwise_not_vortex_buffer[128] 4 µs 5.4 µs -25.69%
⚡ Simulation fsst_decompress_string 526 µs 188.4 µs ×2.8
⚡ Simulation chunked_canonicalize_into[(20, 100, 16, 4)] 739.9 µs 340.6 µs ×2.2
⚡ Simulation chunked_dict_fsst_into_canonical[(250, 10, 2)] 681.9 µs 341.1 µs +99.91%
⚡ Simulation chunked_canonicalize_into[(20, 50, 8, 4)] 274.4 µs 213.1 µs +28.78%
⚡ Simulation bitwise_not_vortex_buffer[2048] 5.8 µs 4.5 µs +28.59%
⚡ Simulation chunked_canonicalize_into[(20, 50, 8, 16)] 279.5 µs 218.3 µs +28.05%
⚡ Simulation chunked_canonicalize_into[(20, 50, 8, 64)] 306.3 µs 242.8 µs +26.16%
⚡ Simulation chunked_into_canonical[(20, 50, 8, 4)] 314.3 µs 252.2 µs +24.59%
⚡ Simulation chunked_into_canonical[(20, 50, 8, 16)] 323.3 µs 261.5 µs +23.63%
⚡ Simulation chunked_into_canonical[(20, 50, 8, 64)] 348.2 µs 285.7 µs +21.87%
⚡ Simulation decompress_fsst[(200, 4, 4)] 60.8 µs 51 µs +19.21%
⚡ Simulation decompress_fsst[(200, 4, 8)] 61.6 µs 51.9 µs +18.76%
⚡ Simulation chunked_canonicalize_into[(10, 150, 4, 4)] 235.3 µs 199.5 µs +17.94%
⚡ Simulation decompress_fsst[(200, 16, 4)] 66.4 µs 56.6 µs +17.3%
⚡ Simulation decompress_fsst[(200, 16, 8)] 69.4 µs 59.7 µs +16.21%
⚡ Simulation chunked_canonicalize_into[(10, 150, 16, 4)] 266.6 µs 230.7 µs +15.57%
⚡ Simulation chunked_canonicalize_into[(20, 100, 16, 16)] 461.3 µs 399.7 µs +15.43%
⚡ Simulation chunked_into_canonical[(10, 150, 4, 4)] 264.9 µs 230.4 µs +15%
⚡ Simulation chunked_into_canonical[(20, 100, 16, 4)] 452.7 µs 397.6 µs +13.85%
... ... ... ... ... ...

ℹ️ Only the first 20 benchmarks are displayed. Go to the app to view all benchmarks.

Tip

Investigate this regression by commenting @codspeedbot fix this regression on this PR, or directly use the CodSpeed MCP with your agent.


Comparing ji/fearless-simd-wins (07f1e33) with develop (3c87da0)2

Open in CodSpeed

Footnotes

  1. 518 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

  2. No successful run was found on develop (d14fa26) during the generation of this report, so 3c87da0 was used instead as the comparison base. There might be some changes unrelated to this pull request in this report. ↩

claude added 2 commits October 6, 2026 13:33
Signed-off-by: Claude <noreply@anthropic.com>

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YUbVgtk4iks9jBGhqe5pTF
Signed-off-by: Claude <noreply@anthropic.com>

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YUbVgtk4iks9jBGhqe5pTF
@joseph-isaacs joseph-isaacs changed the title [codex] Speed up ARM64 bitmap rank-select with Fearless SIMD perf(buffer): use fearless_simd for ARM64 bitmap rank-select Oct 6, 2026
claude added 2 commits October 6, 2026 14:10
Replace the per-architecture chunk scan and in-chunk select (NEON,
AVX-512 VPOPCNTDQ/VBMI2 intrinsics and the scalar fallback) with
fearless_simd kernels used on every target, removing their cfg gating and
CpuKernel dispatch. The BMI2 in-word select stays.

Signed-off-by: Claude <noreply@anthropic.com>

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YUbVgtk4iks9jBGhqe5pTF
Per-16-byte byte-sum reductions took 2.1-2.5x longer than develop on AVX2.
Popcounting u64 lanes matches develop there and lowers to vpopcntq on
AVX-512, like the kernel it replaces.

Signed-off-by: Claude <noreply@anthropic.com>

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01YUbVgtk4iks9jBGhqe5pTF
@joseph-isaacs joseph-isaacs changed the title perf(buffer): use fearless_simd for ARM64 bitmap rank-select perf(buffer): portable fearless_simd kernels for bitmap rank-select Oct 6, 2026
@joseph-isaacs joseph-isaacs added the changelog/chore A trivial change label Oct 6, 2026
@joseph-isaacs
joseph-isaacs marked this pull request as ready for review October 6, 2026 14:36
@joseph-isaacs
joseph-isaacs enabled auto-merge (squash) October 6, 2026 14:36
@joseph-isaacs
joseph-isaacs merged commit dd1ce26 into develop Oct 6, 2026
117 of 119 checks passed
@joseph-isaacs
joseph-isaacs deleted the ji/fearless-simd-wins branch October 6, 2026 14:38
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