[joseph-isaacs]

Summary

Part of the fearless_simd migration (see #10319, #10320, #10321). This is one of three per-crate PRs, alongside the vortex-buffer and vortex-array PRs, and contains only switches that benchmarked equal or faster.

The split-block bloom filter builds its mask with a per-lane multiply and a per-lane variable shift. SSE2 has no variable shift, so the stock x86-64 build can't vectorize make_mask. With fearless_simd u32x8 these lower to vpmulld and vpsllvd on AVX2.

Changes

• bloom_filter/partial/mod.rs: add_hash and find_hash now go through block_insert and block_contains helpers. On x86_64 these use a fearless u32x8 mask, with the SIMD Level detected once in a LazyLock. Other targets and Miri keep the scalar make_mask path.
• The block bits are identical, so serialized filters are unchanged.
• The functions are still called once per value. The benchmark below includes that per-call dispatch and still wins.
• Adds a test that checks the dispatched insert and contains bit-for-bit against make_mask for 10,000 hashes, including clearing each lane in turn.

Benchmarks

In-repo cargo bench -p vortex-layout --bench bloom_filter, which includes XXH3 hashing. Two alternating runs per side, medians; the host is a 4-vCPU Sapphire Rapids VM, so it is noisy.

Bench / blocks	develop (run 1 / run 2)	This PR (run 1 / run 2)
insert / 256	100.0 / 103.9 µs	34.5 / 63.7 µs
insert / 32,768	73.2 / 103.7 µs	36.0 / 67.2 µs
insert / 1,048,576	200.7 / 205.4 µs	81.8 / 144.7 µs
contains_present / 256	106.9 / 103.9 µs	39.7 / 39.7 µs
contains_present / 32,768	108.0 / 108.0 µs	41.7 / 77.0 µs
contains_present / 1,048,576	139.6 / 125.0 µs	53.6 / 93.3 µs
contains_absent / 256	84.9 / 106.3 µs	39.7 / 39.7 µs
contains_absent / 32,768	77.9 / 112.8 µs	41.7 / 41.7 µs
contains_absent / 1,048,576	121.2 / 121.0 µs	52.6 / 55.2 µs

With fearless forced to its AVX2 level, a standalone per-call benchmark was still 1.2–1.3× faster.

Testing

• cargo check -p vortex-layout --all-targets is clean.
• cargo test -p vortex-layout --lib -- bloom: 55 passed.
• Clippy, fmt and the full test suite were not run locally.

🤖 Generated with Claude Code

https://claude.ai/code/session_01YZRAJuGZmP4JRrmAbQQqZx

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Generated by Claude Code

[codspeed]

Merging this PR will degrade performance by 33.08%

⚠️ Unknown Walltime execution environment detected

Using the Walltime instrument on standard Hosted Runners will lead to inconsistent data.

For the most accurate results, we recommend using CodSpeed Macro Runners: bare-metal machines fine-tuned for performance measurement consistency.

⚠️ Different runtime environments detected

Some benchmarks with significant performance changes were compared across different runtime environments,
which may affect the accuracy of the results.

Open the report in CodSpeed to investigate

❌ 9 regressed benchmarks
✅ 2092 untouched benchmarks
⏩ 518 skipped benchmarks¹

Warning

Please fix the performance issues or acknowledge them on CodSpeed.

Performance Changes

	Mode	Benchmark	BASE	HEAD	Efficiency
❌	Simulation	contains_present[256]	368.8 µs	664.8 µs	-44.52%
❌	Simulation	contains_absent[256]	368.9 µs	664.8 µs	-44.51%
❌	Simulation	insert[256]	332.5 µs	575.1 µs	-42.19%
❌	Simulation	contains_present[32768]	724.1 µs	1,020.1 µs	-29.02%
❌	Simulation	contains_absent[32768]	727.6 µs	1,023.5 µs	-28.91%
❌	Simulation	contains_absent[1048576]	802.4 µs	1,098.3 µs	-26.94%
❌	Simulation	contains_present[1048576]	803 µs	1,099 µs	-26.93%
❌	Simulation	insert[32768]	687.7 µs	930.4 µs	-26.09%
❌	Simulation	insert[1048576]	766.6 µs	1,009.3 µs	-24.05%

Tip

Investigate this regression by commenting @codspeedbot fix this regression on this PR, or directly use the CodSpeed MCP with your agent.

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_{Comparing ji/fearless-simd-layout (aacd0fc) with develop (c6e51ba)}

Footnotes

1. 518 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

[joseph-isaacs]

Closing: this adds SIMD to scalar code rather than replacing intrinsics, so it's out of scope for the fearless_simd migration.

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Generated by Claude Code