OSTRICH Assembler for RISC-V ISA

Building...

Refer to ORV-ISA.md for the full set of instructions which ORV supports and ORV-ASM.md on how to structure the assembly file.

For reference, I am using the RISC-V 32I ISA as the basis for the ORV ISA.

p.s. the word OSTRICH is purely for performative reasons.

Issues

Issue #1: Memory addressing

Usage

1. Clone the repository
2. Install dependencies

uv install
# or
pip install -r requirements.txt

3. Run the assembler

uv run -m src.main <input_file.asm> [-o <output_file.list>]

Testing

Run test with:

uv run -m pytest -vv