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soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF#1380

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soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF#1380
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On Shikra, the DDR System Firmware (DSF) configures ECC interrupt routing before the kernel driver probes — it enables Tag/Data RAM interrupts and programs error thresholds in the LLCC interrupt-enable registers.

Set irq_configured in shikra_cfg so that qcom_llcc_edac_probe() skips calling qcom_llcc_core_setup(), which would otherwise overwrite the firmware-managed register state with redundant writes.

@apateriy-qcom

apateriy-qcom commented Jun 18, 2026

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add CRs-Fixed: 4576473 in PR summary.

@faiyaz-mohammed faiyaz-mohammed changed the title EDAC/qcom: Skip ECC interrupt setup on Shikra, pre-configured by DSF soc: qcom: llcc: Skip ECC interrupt setup on Shikra, pre-configured by DSF Jun 18, 2026
…y DSF

On Shikra, the DDR System Firmware (DSF) configures ECC interrupt
routing before the kernel driver probes — it enables Tag/Data RAM
interrupts and programs error thresholds in the LLCC interrupt-enable
registers.

Set irq_configured in shikra_cfg so that qcom_llcc_edac_probe() skips
calling qcom_llcc_core_setup(), which would otherwise overwrite the
firmware-managed register state with redundant writes.

Signed-off-by: Faiyaz Mohammed <faiyazm@qti.qualcomm.com>
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