baselibc: Add option to disable memset and memcpy#3657
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baselibc version of memcpy and memset are optimized for speed if compared to pure C code. However compiler provided version are more efficient. Additionally baselibc version for ARM copies data in revers direction which is allowed but may degrade performance when buffers are aligned but number of bytes to copy is not multiply of 4. Second case where this approach shows it's drawbacks is when memcpy is used to copy data from memory mapped QSPI flash when reading from the last byte is very inefficient. This just add option to drop baselibc version in favor of other (compiler provided or user provided).
andrzej-kaczmarek
approved these changes
Jun 1, 2026
memcpy used to work in descending order to minimize code size. Updates ARM memcpy version to work in ascending order. For aligned buffers time to copy does not changes significantly when buffer to copy increases by 1 which was the case when even for aligned buffers code performed unaligned reads when nuber of bytes to copy was not multiply of 4. Code enables 32-bit copy for Cortex-M0 (which was not the case), aligned buffers are copied much faster now. This change also improves performance on memory mapped QSPI flashes when reading successful data is much faster then reading in reverse direction.
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baselibc version of memcpy and memset are optimized for speed if compared to pure C code.
However compiler provided version are more efficient. Additionally baselibc version for ARM copies data
in revers direction which is allowed but may degrade performance when buffers are aligned but number of bytes to copy is not multiply of 4.
Second case where this approach shows it's drawbacks is when memcpy is used to copy data from memory mapped QSPI flash when reading from the last byte is very inefficient.
This just add option to drop baselibc version in favor of other (compiler provided or user provided).
baselibc version now copies 8-bit/32-bit words from the beginning. It is slightly slower that previous version when 8-bit copy kicks in. It is much faster for Cortex-M0 when buffers are aligned. It is faster when buffers are aligned but length is not multiply of 4.