Accelerator Project updated

Author: DevPro13

src/Projects.jsx

@@ -31,6 +31,18 @@ const PROJECTS = [
   },
   {
     id: 3,
+    category: "Hardware",
+    title: "RISC-V-Complete-Multicycle-Processor Design",
+    tag: "VLSI design and verification",
+    image: "https://raw.githubusercontent.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design/refs/heads/main/Img/risc-v%20complete.jpg",
+    bio: "A complete multi-cycle processor was modelled and tested using System-Verilog.",
+    details: "https://raw.githubusercontent.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design/refs/heads/main/README.md",
+    stack: ["SystemVerilog", "ModelSim", "RISC-V", "TestBench"],
+    year: "2024",
+    link: "https://github.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design",
+  },
+  {
+    id: 4,
     category: "Software",
     title: "Dijkstra-s-Algorithm-Visualizer",
     tag: "C++, Data Structure",
@@ -42,7 +54,19 @@ const PROJECTS = [
     link: "https://github.com/DevPro13/Dijkstra-s-Algorithm-Visualizer",
   },
   {
-    id: 4,
+    id: 5,
+    category: "Hardware",
+    title: "Design and Verification of a Fixed Point Attention Accelerator",
+    tag: "AI Accelerator, SYstemVerilog, Attention Mechanism",
+    image: "https://raw.githubusercontent.com/DevPro13/Design-and-Verification-of-a-Fixed-Point-Attention-Accelerator/refs/heads/main/inputfiles/AttentionMechanismIllustration.png",
+    bio: "A simple hardware acceerator to obtain the embedding vector for the input sequence of tokens.",
+    details: "https://raw.githubusercontent.com/DevPro13/Fall-Detection-and-Alarming-Sys/refs/heads/main/README.md",
+    stack: ["VLSI", "AI Accelerators", "Hardware Design", "HPC", "FPGA"],
+    year: "2026",
+    link: "https://github.com/DevPro13/Design-and-Verification-of-a-Fixed-Point-Attention-Accelerator",
+  },
+  {
+    id: 6,
     category: "Hardware",
     title: "Startracker Simulator for Attitude Determination of Spacecraft",
     tag: "Startracker, CCD, Star Catalogue",
@@ -54,19 +78,7 @@ const PROJECTS = [
     link: "https://github.com/DevPro13/Startracker-Simulator-for-Attitude-Determination-of-Spacecrafts",
   },
   {
-    id: 5,
-    category: "Hardware",
-    title: "RISC-V-Complete-Multicycle-Processor Design",
-    tag: "VLSI design and verification",
-    image: "https://raw.githubusercontent.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design/refs/heads/main/Img/risc-v%20complete.jpg",
-    bio: "A complete multi-cycle processor was modelled and tested using System-Verilog.",
-    details: "https://raw.githubusercontent.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design/refs/heads/main/README.md",
-    stack: ["SystemVerilog", "ModelSim", "RISC-V", "TestBench"],
-    year: "2024",
-    link: "https://github.com/DevPro13/RISC-V-Complete-Multicycle-Processor-Design",
-  },
-  {
-    id: 6,
+    id: 7,
     category: "Hardware",
     title: "Fall Detection and Alerting System",
     tag: "Fall Detection, Hardware Design, PI processor",
@@ -78,7 +90,7 @@ const PROJECTS = [
     link: "https://github.com/DevPro13/Fall-Detection-and-Alarming-Sys",
   },
   {
-    id: 7,
+    id: 8,
     category: "Hardware",
     title: "Internet of Medical Things and Streaming",
     tag: "ESP32",
@@ -197,7 +209,7 @@ function ProjectCard({ project, onReadmeOpen }) {
   );
 }
 
-const VISIBLE_COUNT = 3;// no of projects tiles to display
+const VISIBLE_COUNT = 4;// no of projects tiles to display
 
 export default function Projects() {
   const [activeTab, setActiveTab]       = useState("hardware");